The invention relates to a radio set comprising an oscillator with a phase-locked loop, and at least a divider incorporated in the phase-locked loop, to which divider a binary value can be applied for setting a variable division ratio.
Phase-locked loops (PLL) are used for follow-up synchronization, for synchronizing the frequency of an oscillator so that it is phase-locked to a reference frequency. For this purpose, the oscillator is readjusted so that a predetermined phase relation is maintained between the two clocks. Instead of the direct comparison between the oscillator and the reference clock, also clocks derived through a division are often used. By properly selecting the division ratios, different output frequencies of the oscillator can be synchronized in this manner. Phase locked loops of this type are chiefly used in radio sets wherein they are used for synchronizing the frequencies of different channels.
U.S. Pat. No. 4,654,859 discloses an oscillator with a phase-locked loop, wherein a programmable divider arranged in the phase-locked loop is connected to a microprocessor over data lines. The division ratio necessary for each output frequency is accordingly set in the programmable divider by means of the microprocessor.
Since a divider can be programmed, one is extremely free to select the output frequencies. However, division ratios for whose representation a large number of binary positions are necessary are often to be employed.